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There are many
approaches to building

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a general-purpose computer that
can be easily re-programmed

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for new problems.

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Almost all modern computers are
based on the “stored program”

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computer architecture developed
by John von Neumann in 1945,

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which is now commonly referred
to as the “von Neumann model”.

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The von Neumann model
has three components.

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There’s a central processing
unit (aka the CPU) that

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contains a datapath and control
FSM as described previously.

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The CPU is connected
to a read/write memory

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that holds some number W
of words, each with N bits.

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Nowadays, even small
memories have a billion words

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and the width of each
location is at least 32 bits

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(usually more).

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This memory is often referred to
as “main memory” to distinguish

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it from other memories
in the system.

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You can think of it as an array:
when the CPU wishes to operate

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on values in memory , it sends
the memory an array index,

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which we call the address, and,
after a short delay (currently

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10’s of nanoseconds) the memory
will return the N-bit value

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stored at that address.

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Writes to main memory
follow the same protocol

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except, of course,
the data flows

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in the opposite direction.

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We’ll talk about memory
technologies a couple

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of lectures from now.

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And, finally, there are
input/output devices

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that enable the computer
system to communicate

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with the outside world or
to access data storage that,

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unlike main memory, will
remember values even when

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turned off.

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The key idea is
to use main memory

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to hold the instructions
for the CPU as well as data.

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Both instructions and data are,
of course, just binary data

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stored in main memory.

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Interpreted as an
instruction, a value in memory

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can be thought of as a set of
fields containing one or bits

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encoding information
about the actions

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to be performed by the CPU.

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The opcode field indicates
the operation to be performed

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(e.g., ADD, XOR, COMPARE).

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Subsequent fields specify which
registers supply the source

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operands and the
destination register

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where the result is stored.

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The CPU interprets the
information in the instruction

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fields and performs the
requested operation.

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It would then move on to the
next instruction in memory,

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executing the stored
program step-by-step.

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The goal of this
chapter is to discuss

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the details of what operations
we want the CPU to perform,

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how many registers we
should have, and so on.

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Of course, some values in
memory are not instructions!

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They might be binary
data representing

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numeric values, strings
of characters, and so on.

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The CPU will read these values
into its temporary registers

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when it needs to operate on them
and write newly computed values

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back into memory.

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Mr. Blue is asking a
good question: how do we

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know which words in
memory are instructions

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and which are data?

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After all, they’re
both binary values!

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The answer is that we can’t tell
by looking at the values — it’s

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how they are used by the CPU
that distinguishes instructions

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from data.

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If a value is loaded
into the datapath,

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it’s being used as data.

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If a value is loaded
by the control logic,

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it’s being used an instruction.

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So this is the digital
system we’ll build to perform

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computations.

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We’ll start with a datapath
that contains some number

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of registers to
hold data values.

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We’ll be able to select which
registers will supply operands

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for the arithmetic and
logic unit that will perform

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an operation.

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The ALU produces a result
and other status signals.

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The ALU result can
be written back

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to one of the registers
for later use.

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We’ll provide the datapath with
means to move data to and from

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main memory.

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There will be a
control unit that

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provides the necessary control
signals to the datapath.

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In the example
datapath shown here,

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the control unit would
provide ASEL and BSEL

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to select two register
values as operands

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and DEST to select
the register where

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the ALU result will be written.

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If the datapath had, say,
32 internal registers,

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ASEL, BSEL and DEST
would be 5-bit values,

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each specifying a particular
register number in the range

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0 to 31.

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The control unit also
provides the FN function code

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that controls the operation
performed by the ALU.

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The ALU we designed in
Part 1 of the course

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requires a 6-bit
function code to select

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between a variety of arithmetic,
boolean and shift operations.

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The control unit would load
values from main memory

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to be interpreted
as instructions.

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The control unit
contains a register,

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called the “program counter”,
that keeps track of the address

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in main memory of the next
instruction to be executed.

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The control unit also
contains a (hopefully small)

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amount of logic to translate
the instruction fields

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into the necessary
control signals.

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Note the control unit
receives status signals

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from the datapath that will
enable programs to execute

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different sequences
of instructions

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if, for example, a particular
data value was zero.

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The datapath serves as the
brawn of our digital system

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and is responsible for storing
and manipulating data values.

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The control unit serves as
the brain of our system,

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interpreting the program
stored in main memory

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and generating the necessary
sequence of control

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signals for the datapath.

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Instructions are the
fundamental unit of work.

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They’re fetched by the control
unit and executed one after

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another in the order
they are fetched.

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Each instruction
specifies the operation

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to be performed along
with the registers

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to supply the source operands
and destination register where

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the result will be stored.

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In a von Neumann machine,
instruction execution

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involves the steps shown here:

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the instruction is
loaded from the memory

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location whose address is
specified by the program

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counter.

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When the requested data
is returned by the memory,

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the instruction
fields are converted

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to the appropriate control
signals for the datapath,

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selecting the source operands
from the specified registers,

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directing the ALU to perform
the specified operation,

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and storing the result in the
specified destination register.

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The final step in
executing an instruction

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is updating the
value of the program

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counter to be the address
of the next instruction.

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This execution loop is
performed again and again.

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Modern machines can execute
up more than a billion

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instructions per second!

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The discussion so far
has been a bit abstract.

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Now it’s time to roll up our
sleeves and figure out what

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instructions we want
our system to support.

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The specification of instruction
fields and their meaning

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along with the details
of the datapath design

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are collectively called the
instruction set architecture

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(ISA) of the system.

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The ISA is a detailed functional
specification of the operations

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and storage
mechanisms and serves

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as a contract
between the designers

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of the digital hardware
and the programmers who

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will write the programs.

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Since the programs are stored
in main memory and can hence be

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changed, we’ll
call them software,

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to distinguish them from
the digital logic which,

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once implemented,
doesn’t change.

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It’s the combination of hardware
and software that determine

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the behavior of our system.

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The ISA is a new
layer of abstraction:

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we can write programs
for the system

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without knowing
the implementation

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details of the hardware.

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As hardware
technology improves we

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can build faster systems without
having to change the software.

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You can see here that over
a fifteen year timespan,

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the hardware for executing
the Intel x86 instruction set

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went from executing 300,000
instructions per second

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to executing 5 billion
instructions per second.

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Same software as before, we’ve
just taken advantage of smaller

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and faster MOSFETs to build
more complex circuits and faster

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execution engines.

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But a word of
caution is in order!

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It’s tempting to make choices
in the ISA that reflect

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the constraints of current
technologies, e.g.,

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the number of
internal registers,

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the width of the operands,
or the maximum size of main

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memory.

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But it will be hard to change
the ISA when technology

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improves since there’s a
powerful economic incentive

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to ensure that old software
can run on new machines,

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which means that a particular
ISA can live for decades

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and span many generations
of technology.

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If your ISA is successful,
you’ll have to live with any

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bad choices you made
for a very long time.

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Designing an ISA is hard!

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What are the operations
that should be supported?

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How many internal registers?

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How much main memory?

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Should we design the
instruction encoding

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to minimize program size or to
keep the logic in the control

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unit as simple as possible?

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Looking into our
crystal ball, what

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can we say about the computation
and storage capabilities

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of future technologies?

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We’ll answer these questions by
taking a quantitative approach.

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First we’ll choose a set
of benchmark programs,

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chosen as representative of
the many types of programs we

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expect to run on our system.

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So some of benchmark
programs will

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perform scientific and
engineering computations,

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some will manipulate
large data sets

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or perform database
operations, some

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will require specialized
computations for graphics

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or communications, and so on.

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Happily, after many
decades of computer use,

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several standardized
benchmark suites

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are available for us to use.

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We’ll then implement the
benchmark programs using

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our instruction set and simulate
their execution on our proposed

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datapath.

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We’ll evaluate the results to
measure how well the system

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performs.

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But what do we mean by “well”?

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That’s where it
gets interesting:

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“well” could refer to execution
speed, energy consumption,

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circuit size, system cost, etc.

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If you’re designing
a smart watch,

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you’ll make different choices
than if you’re designing

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a high-performance graphics
card or a data-center server.

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Whatever metric you choose to
evaluate your proposed system,

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there’s an important design
principle we can follow:

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identify the common
operations and focus on them

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as you optimize your design.

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For example, in
general-purpose computing,

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almost all programs
spend a lot of their time

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on simple arithmetic
operations and accessing values

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in main memory.

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So those operations
should be made as fast

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and energy efficient
as possible.

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Now, let’s get to work designing
our own instruction set

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and execution engine, a
system we’ll call the Beta.